New chip design from Samsung and IBM could lead to week-long battery life on smartphones

Following news that we broke earlier this month that Xiaomi had found a way to increase the capacity of their battery without compromising on size and efficiency, Samsung and IBM are up next with a new innovation in semiconductor design.

The aforementioned two companies have announced that they have found a new way to stack transistors vertically on a chip. This is a sharp contrast to the current state of the market, where they are normally laid flat on the surface of the semiconductor.

The new method of alignment is called Vertical Transport Field Effect Transistors (VTFET) design and should it turn out as expected, it will be replacing the current FinFET technology that is used for most of today’s most advanced chips.

The new design would allow for more chips that are much more densely packed with transistors compared to what is already available in the market. The bare-bones explanation is that the new design would stack transistors vertically, making it possible for current to flow up and down the stack of transistors, contrary to the side-to-side horizontal layout that is currently used on most chips.

Semiconductors being designed in vertical alignment is not necessarily new as the current FinFET designs already offer some of the benefits, but no manufacturer had yet fully focused on only dealing with vertical designs. Intel, a major player in chip design, already has plans of their own in stacking chip components. The major difference between what Samsung and IBM are doing compared to Intel is that they are stacking individual transistors rather than the chip components as a whole.

READ:  It is now possible to text from your computer using Google's Messages app

This is all good news, but if we are being realistic, we are still a few years away from seeing VTFET designs being brought to consumer chips. This, however, has not stopped IBM and Samsung from making some very big claims, noting that VTFET chips could offer a “two times improvement in performance or an 85 percent reduction in energy use” compared to FinFET designs.

They also add that by packing more transistors into the chips, VTFET technology would help keep Moore’s law’s goal of steadily increasing transistor count alive for a few more years.

Some of the use cases for their innovation as outlined by the two companies include the fascinating idea of “cell phone batteries that could go over a week without being charged, instead of days,” as well as less energy-intensive cryptocurrency mining or data encryption. The innovation would also pave the way for more powerful IoT devices and even spacecraft.

Chips have become gradually smaller with each passing year. Just a few years back, Intel dominated the PC market with their 14 nm process, before AMD came back swinging with their much-acclaimed 7 nm process that has brought back much-needed competition in the market. On the mobile scene, Samsung has the 5 nm chips being used on their Galaxy S series as well as on their other flagships like the foldables, while Intel and TSMC are also developing their own 5 nm node.

Naftaly is a Computer Science graduate with a passion for tech, video games and pop culture. When he is not writing articles for AndroidKenya, he is probably rewatching the Lord of the Rings trilogy for the hundredth time. Email at Twitter @KarisNaftaly

One Ping

  1. Pingback: Google reportedly working on new adpative charging system that will extend battery life on Chromebooks

Leave a Reply

Your email address will not be published.